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projects:nbitinteger [2016/10/30 18:16] sbsprojects:nbitinteger [2016/10/30 18:19] (current) sbs
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 The development of a compilation strategy for m-dimensional arrays of n-bit integers poses a major challenge when attempting to target a wide range of architectures with vector instructions including mainstream architectures such as X86 and Sparc as well as novel multicores such as the Cell Broadband Engine or Intel's Larrabee processor. The development of a compilation strategy for m-dimensional arrays of n-bit integers poses a major challenge when attempting to target a wide range of architectures with vector instructions including mainstream architectures such as X86 and Sparc as well as novel multicores such as the Cell Broadband Engine or Intel's Larrabee processor.
  
-Current Status: Artem looked into this and ended up doing layout transformations for vectorisation. This work should build on Artem's vectorisation and introduce SIMD in a register support. +**Current Status**: Artem looked into this and ended up doing layout transformations for vectorisation. This work should build on Artem's vectorisation and introduce SIMD in a register support.
  
 +**Needed Work:**
 +  * Integration of new n-bit data types
 +  * translation schemes for SIMD in a register
 +  * implementation of SIMD in a register; including padding for n-dimensional arrays
 +  * performance evaluation